Title Enhancement-mode Ga2O3 MOSFETs with Si-ion-implanted source and drain
  Abstract Enhancement-mode ƒÀ-Ga2O3 metal-oxide-semiconductor field-effect transistors with low series resistance were achieved by Si-ion implantation doping of the source/drain contacts and access regions. An unintentionally doped Ga2O3 channel with low background carrier concentration that was fully depleted at a gate bias of 0 V gave rise to a positive threshold voltage without additional constraints on the channel dimensions or device architecture. Transistors with a channel length of 4 ƒÊm delivered a maximum drain current density (IDS) of 1.4 mA/mm and an IDS on/off ratio near 10^6. Nonidealities associated with the Al2O3 gate dielectric as well as their impact on enhancement-mode device performance are discussed.
  Pub Date 07-Mar-17
  Media
  Subject Semiconductor Device
  Authors
(Only the employees of NICT with their latest affiliations are displayed)
WONG MAN HOI   (Green ICT Device Advanced Development Center)
Nakata Yoshiaki
  (Green ICT Device Advanced Development Center)
Higashiwaki Masataka
  (Green ICT Device Advanced Development Center)
  Subdivision Paper

  Reference Infomation

Copyright(C)2010 National Institute of Information and Communications Technology (NICT) All Rights Reserved